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Fine-Grain Compilation for Pipelined Machines

dc.contributor.authorPingali, Keshaven_US
dc.date.accessioned2007-04-23T17:34:11Z
dc.date.available2007-04-23T17:34:11Z
dc.date.issued1988-08en_US
dc.description.abstractComputer architecture design requires careful attention to the balance between the complexity of code scheduling problems and the cost and feasibility of building a machine. In this paper, we show that recently developed software pipelining algorithms produce optimal or near-optimal code for a large class of loops when the target architecture is a clean pipelined parallel machine. The important feature of these machines is the absence of structural hazards. We argue that the robustness of the scheduling algorithms and relatively simple hardware make these machines realistic and cost-effective. To illustrate the delicate balance between architecture and scheduling complexity, we show that scheduling with structural hazards is NP-hard, and that there are machines with simple structural hazards for which vectorization and the software pipelining techniques generate poor code.en_US
dc.format.extent1752164 bytes
dc.format.extent459341 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/postscript
dc.identifier.citationhttp://techreports.library.cornell.edu:8081/Dienst/UI/1.0/Display/cul.cs/TR88-934en_US
dc.identifier.urihttps://hdl.handle.net/1813/6774
dc.language.isoen_USen_US
dc.publisherCornell Universityen_US
dc.subjectcomputer scienceen_US
dc.subjecttechnical reporten_US
dc.titleFine-Grain Compilation for Pipelined Machinesen_US
dc.typetechnical reporten_US

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