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Operand-Optimized Asynchronous Floating-Point Arithmetic Circuits

dc.contributor.authorSheikh, Basiten_US
dc.contributor.chairManohar, Rajiten_US
dc.contributor.committeeMemberAlbonesi, David H.en_US
dc.contributor.committeeMemberSuh, Gookwon Edwarden_US
dc.date.accessioned2012-06-28T20:56:44Z
dc.date.available2017-06-01T06:00:32Z
dc.date.issued2012-01-31en_US
dc.identifier.otherbibid: 7745067
dc.identifier.urihttps://hdl.handle.net/1813/29239
dc.language.isoen_USen_US
dc.subjectAsynchronous logic circuitsen_US
dc.subjectArithmetic circuitsen_US
dc.subjectVLSI designen_US
dc.titleOperand-Optimized Asynchronous Floating-Point Arithmetic Circuitsen_US
dc.typedissertation or thesisen_US
thesis.degree.disciplineElectrical Engineering
thesis.degree.grantorCornell Universityen_US
thesis.degree.levelDoctor of Philosophy
thesis.degree.namePh. D., Electrical Engineering

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