CHAMELEON SHARED MEMORY: IMPLEMENTING A THIN ARCHITECTURAL LAYER TO SUPPORT SHARED MEMORY ACROSS MULTIPLE BLADES
| dc.contributor.author | Dolen, Christopher | |
| dc.date.accessioned | 2007-09-05T17:17:36Z | |
| dc.date.available | 2012-09-05T06:14:30Z | |
| dc.date.issued | 2007-09-05T17:17:36Z | |
| dc.description.abstract | Highly integrated SMPs can execute a broad range of workloads, but are expensive and monolithic. It is difficult incrementally to add processing power to a highly integrated SMP, which requires the system to be large enough to handle all possible workloads. This can be unnecessarily expensive and wasteful when executing tasks that do not require such computational power. Clusters are cheap and modular, but cannot execute the same workloads, and are more difficult to manage. Although it is easier incrementally to add more processors to a cluster, communication time between processors is much larger, and running applications with high interprocessor communication is not feasible. Clusters must use message passing instead of shared memory, and managing a large cluster can be difficult, due to the extensive system administration required for many individual systems. We present a system that gives us the best of both worlds: modular and scalable systems that are easy to manage and can execute a broad range of applications. | en_US |
| dc.format.extent | 800086 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.other | bibid: 6476414 | |
| dc.identifier.uri | https://hdl.handle.net/1813/8236 | |
| dc.language.iso | en_US | en_US |
| dc.title | CHAMELEON SHARED MEMORY: IMPLEMENTING A THIN ARCHITECTURAL LAYER TO SUPPORT SHARED MEMORY ACROSS MULTIPLE BLADES | en_US |
| dc.type | dissertation or thesis | en_US |
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