Constructing Vertically Integrated Hardware Design Methodologies Using Embedded Domain-Specific Languages And Just-In-Time Optimization
| dc.contributor.author | Lockhart, Derek | |
| dc.contributor.chair | Batten,Christopher | |
| dc.contributor.committeeMember | Zhang,Zhiru | |
| dc.contributor.committeeMember | Manohar,Rajit | |
| dc.date.accessioned | 2015-10-15T18:01:11Z | |
| dc.date.available | 2015-10-15T18:01:11Z | |
| dc.date.issued | 2015-08-17 | |
| dc.description.abstract | The growing complexity and heterogeneity of modern application-specific integrated circuits has made hardware design methodologies a limiting factor in the construction of future computing systems. This work aims to alleviate some of these design challenges by embedding productive hardware modeling and design constructs in general-purpose, high-level languages such as Python. Leveraging Python-based embedded domain-specific languages (DSLs) can considerably improve designer productivity over traditional design flows based on hardware-description languages (HDLs) and C++, however, these productivity benefits can be severely impacted by the poor execution performance of Python simulations. To address these performance issues, this work combines Python-based embedded-DSLs with just-in-time (JIT) optimization strategies to generate high-performance simulators that significantly reduce this performance-productivity gap. This thesis discusses two frameworks I have constructed that use this novel design approach: PyMTL, a Python-based, concurrent-structural modeling framework for vertically integrated hardware design, and Pydgin, a framework for generating high-performance, just-in-time optimizing instruction set simulators from high-level architecture descriptions. | |
| dc.identifier.other | bibid: 9255182 | |
| dc.identifier.uri | https://hdl.handle.net/1813/40914 | |
| dc.language.iso | en_US | |
| dc.subject | Hardware Design Methodologies | |
| dc.subject | Computer Architecture | |
| dc.subject | VLSI | |
| dc.title | Constructing Vertically Integrated Hardware Design Methodologies Using Embedded Domain-Specific Languages And Just-In-Time Optimization | |
| dc.type | dissertation or thesis | |
| thesis.degree.discipline | Electrical Engineering | |
| thesis.degree.grantor | Cornell University | |
| thesis.degree.level | Doctor of Philosophy | |
| thesis.degree.name | Ph. D., Electrical Engineering |
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