An Fpga Based Test Bench With High Speed Data Acquisition For Mixed Signal Applications
Although multiple data link protocols that can handle 10's of Gbps have been developed over the years, engineers in the test industry either rely on dated standards such as RS-232 and GPIB or expensive dedicated hardware that is inflexible and costly. This work investigated building a framework for a test bench that is inexpensive, scalable, open source, and easily implemented. This work reviewed modern protocols such as USB, Ethernet, and PCI-Express to determine which protocol was the most practical as the backbone of the framework. The framework chose to rely on USB to provide the physical link and data protocol to interface an FPGA to a PC. The interface within the PC is a virtual communications port that can be utilized by a simple terminal program or scripting language such as MATLAB. The sustained data rates achieved by this framework were 480 Mbps or over 5,000 times faster than RS-232.
FPGA; ASIC Testing; Data Acquisition
M.S., Electrical Engineering
Master of Science
dissertation or thesis