NANOCRYSTAL MEMORY SCALING: FROM MATERIAL SELECTION TO PERFORMANCE IMPROVEMENT
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Below the 65nm technology node, the present Flash memory technology is facing daunting scaling challenges. Smart and heterogeneous integration of materials throughout the entire device structure is required to facilitate the feature-size scaling without compromising the memory performance. The metal nanocrystal (NC) memory is promising for realizing high-density nonvolatile storage, while providing unique advantages on low-voltage operation and superior cycling lifetime. We present in this work a combined experimental and modeling study on the metal NC memory. A physical model based on the three-dimensional (3D) electrostatics and the one-dimensional (1D) Wentzel-Kramers-Brillouin (WKB) tunneling current calculation is established. The optimization strategies including NC array, gate dielectrics, and charge storage nodes are further detailed to achieve efficient program/erase (P/E) at 4V. Beyond the metal NC memory, in the efforts of realizing hybrid molecular / Si electronics, we show programmable and quantized redox states of C60 molecules in a nonvolatile memory cell at room-temperature. C60 may also be employed as a double-junction resonant tunnel barrier in nonvolatile memories with improved tunneling asymmetry between P/E and retention.
This work is supported by National Science Foundation (NSF) through the Center of Nanoscale Systems (CNS).
Nanoelectronics; Memory; Nanocrystal; Molecular electronics
dissertation or thesis