All promising applications of terahertz (THz) and millimeter-wave (mm-wave) systems, from imaging and spectroscopy to high data-rate communication, necessitate the design of high efficiency signal sources and amplifiers. In addition to the high propagation loss of the signals in these frequency ranges, the poor activity of the existing CMOS/SiGe devices working above fmax/2 emphasizes on the importance of developing new design methods in order to have high output power and efficiency signal sources and high power gain amplifiers. Despite of these challenges in circuit design at this frequency range, the myriad applications of the systems working in this frequency range has attracted many researchers to work on these systems. In the past ten years, the reported output power of signal sources in this frequency range has increased by more than 40 dB which is a huge progress. High frequency amplifiers have also passed through a tremendous progress during the past decade. However, generating sufficient power is still one of the critical issue in these systems. Indeed, the so-called “terahertz gap” is a quite well-known fact, which means both silicon based electronics and photonics based devices are incapable of generating adequate power in the mm-wave and terahertz frequency range. Thus, the researchers have to come up with new methodologies to increase the output power. This main challenge presents itself in designing two fundamental circuit blocks that appear in most electronic systems and circuits, i.e. the signal sources and the amplifiers. Compared to low frequency, the former lacks high DC-to-RF efficiency and the latter suffers from a low power gain. Chapter 1 provides a complete overview of progress and challenges in mm-wave and THz signal source design. In Chapter 2 a novel approach to design efficient high-outputpower fundamental oscillators beyond fmax/2 of the employed process is presented. The idea is to shape and maximize the unilateral power gain of the network at the desired frequency using optimum passive internal and external feedback networks. The proposed technique significantly improves the output power and DC-to-RF efficiency of the oscillator. To show the feasibility of this novel approach, a 175 GHz fundamental oscillator is designed in a 130 nm SiGe BiCMOS process (fmax ' 280 GHz), which achieves a measured DC-to-RF efficiency of 11.7% that is one of the highest ones among all previously reported oscillators above fmax/3 of their active devices. Measurements show that the designed oscillator generates a peak power of 3 mW (4.8 dBm) with a phase noise FoM of -195.4 dBc/Hz at 1 MHz offset frequency, which is the highest phase noise FoM among all reported CMOS/BiCMOS mm-wave and terahertz oscillators. The proposed method takes into account the possible PVT variations as well as modeling errors of the passive components in the design stage. A similar approach to design efficient high-output-power fundamental oscillators close to the fmax of the employed process is presented in Chapter 3. The idea is based on shaping and optimizing the maximally efficient power gain (GME) of the circuit using a pair of internal/external feedback mechanisms. Solving a constrained optimization problem, an optimum pair of passive feedback network is designed to achieve the highest maximally efficient power gain in order to increase the output power and thence the DC-to-RF efficiency. A 195 GHz fundamental oscillator is designed in a 55 nm SiGe process (fmax ' 340 GHz), which achieves a significantly higher DC-to-RF efficiency (15.3%) among all reported oscillators working above fmax/3 of their active devices. The oscillator generates a peak power of 4.5 mW (6.5 dBm) with the best phase noise of -82.3 dBc/Hz and the best FoM of -197 dBc/Hz measured at 100 KHz offset frequency, which is the best phase noise and FoM among all CMOS/SiGe mm-Wave oscillators. The proposed optimization-based method takes into account PVT variations as well as modeling errors of all components in the design process to guarantee the functionality of the fabricated circuit. The last two chapters address the challenging problem of designing high power gain amplifiers at mm-wave and THz frequency ranges. A novel theory of stability for twoport networks is developed in Chapter 4. Using this theory, a new method of designing amplifiers with high power gain working close to the maximum frequency of oscillation (fmax) is proposed. Contrary to the existing amplifier design methodologies, in this method the transistor capability of power amplification is fully utilized. This becomes more important at frequencies close to the fmax where having high power gain is challenging due to degraded activity of the employed device. The proposed method considers the modeling errors and process-voltage-temperature (PVT) variations of the employed components in the design stage to ensure that the fabricated amplifier will be stable with a decent power gain even if the worst case variations and modeling errors happen. To show the feasibility of the proposed approach, a three-stage amplifier at 173 GHz, using BJT’s from a 130 nm SiGe process is designed. The fabricated amplifier has a maximum measured power gain of 18.5 dB at 173 GHz which achieves highest defined power gain FoM among all reported state of the arts. Chapter 5 proposes a new approach to design a mm-wave high power gain cascode amplifier. The gain is enhanced by adjusting the size of the cascode transistor together with a desensitized inductive impedance at its base. The impedance at this node has a critical role in determining both gain and stability. The employed desensitization technique decreases the effect of process variations and modeling errors on this impedance which results in a reliable design. Providing enough degrees of freedom, this method results in a conjugate matched input and output impedances. Therefore, two or more of this stage can be simply cascaded to get higher gain with no need for an inter-stage matching network and hence no additional loss and gain degradation. Based on this approach, a single stage amplifier at 183 GHz is implemented in a 130 nm SiGe process which has a power gain of 9.5 dB, 3 dB bandwidth of 8.5 GHz and saturation power of -2.8 dBm.