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  4. Modular Abstractions for Efficient Hardware Design

Modular Abstractions for Efficient Hardware Design

File(s)
Nigam_cornellgrad_0058F_14808.pdf (4.43 MB)
Permanent Link(s)
https://doi.org/10.7298/bhk5-5j25
https://hdl.handle.net/1813/117609
Collections
Cornell Theses and Dissertations
Author
Nigam, Rachit
Abstract

Hardware design is primarily concerned with efficiency: the need to implement the fastest circuit using the least amount of resources and power. Coupled with the staggering amounts of resources poured into designing, manufacturing, and deploying hardware, optimization decisions dominate the design of tools for hardware design. Modularity, or the separation of concerns, allows for design of reusable components and has been a primary driver of the software revolution. However, in hardware design, it has taken a backseat; modular design obfuscates key properties of circuits which may lead to inefficient implementation. In the specialization era, where performance gains are driven by designing hardware for specific computations, the need for modular and efficient abstractions for hardware design is dire. This thesis identifies explicit reasoning about time as a key ingredient for the design of such abstractions and embodies them in three systems. First, Dahlia, an imperative language that compiles to hardware and uses time-sensitive reasoning to ensure that surface programs compile to efficient hardware. Second, Calyx, a compiler and an intermediate language for transforming Dahlia-like languages into hardware descriptions. Calyx bridges the gap between computational descriptions and circuit implementations using a novel intermediate language that mixes software-like control flow and hardware-like structural constructs. Calyx further resolves the tension between precise modeling of cycle-level time and scalable compiler optimizations by exploiting the observation that time-sensitive execution schedules are a refinement of time-insensitive ones. Finally, Filament, a new hardware description language that directly models cycle-level constraints in the interfaces of modules and ensures, at compile-time, that designs do not have any structural hazards. Together, these systems explore the importance of reasoning about time in the context of hardware design and beckon towards a future where modular abstractions do not need to compromise on efficiency.

Description
273 pages
Date Issued
2025-05
Keywords
Compilers
•
Computer Architecture
•
Hardware Design
•
Programming Languages
Committee Chair
Sampson, Adrian
Committee Member
Foster, John
De Sa, Christopher
Zhang, Zhiru
Degree Discipline
Computer Science
Degree Name
Ph. D., Computer Science
Degree Level
Doctor of Philosophy
Rights
Attribution-NonCommercial-NoDerivatives 4.0 International
Rights URI
https://creativecommons.org/licenses/by-nc-nd/4.0/
Type
dissertation or thesis
Link(s) to Catalog Record
https://newcatalog.library.cornell.edu/catalog/16938436

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