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Zhang, Hanqiao Xing, Huili Jena, Debdeep 2025-01-14T19:40:08Z 2025-01-14T19:40:08Z 2024-08 ProQuest Submission ID: 12157 ProQuest Publication ID: 31336226 https://hdl.handle.net/1813/116362 https://doi.org/10.7298/r7y5-4d18 16611654 92 pages With remarkable attributes of unique polarization characteristics, high electron mobility, and saturation velocity, gallium nitride (GaN) material has emerged as a key contender in the high-performance semiconductor market, paving the way for the future optoelectronics and high-frequency electronics. The oxide/semiconductor interface quality could significantly impact device performance and reliability if not properly managed. This thesis intends to categorize different types of charge trapping effects at the oxide/semiconductor interface and highlight their influence on the device performance. The approach to identify and separate the influence of different oxide traps is suggested based on electrical characterization methods. The quality of the oxide/GaN interface is discussed in the context of experimentally fabricated MOS capacitors on n-type GaN (000), utilizing dielectric materials grown by plasma-enhanced atomic layer deposition. Additionally, this thesis presents findings from the 1st and 2nd generation GaN homojunction tunnel diodes, contributing to the fabrication of MOS capacitors on p-type GaN (0001) substrate for interface quality studies. Lastly, recommendations for optimized device design are provided based on literature survey. en Gallium nitride N-polar n-GaN MOSCAP and Tunnel Junctions Toward p-GaN MOSCAP dissertation or thesis https://newcatalog.library.cornell.edu/catalog/16611654 application/pdf Electrical and Computer Engineering Cornell University Master of Science M.S., Electrical and Computer Engineering https://hdl.handle.net/1813/59810.2 Publication Cornell Theses and Dissertations Zhang, Hanqiao 5893a6ea-7af3-41d7-abc6-04bcd26ab5df open.access open.access <Publication xmlns="https://www.openaire.eu/cerif-profile/1.1/" id="05772afc-09b2-44da-bbfb-24d47b4c41eb"> <Type xmlns="https://www.openaire.eu/cerif-profile/vocab/COAR_Publication_Types">http://purl.org/coar/resource_type/c_1843</Type> <Language>en</Language> <Title>N-polar n-GaN MOSCAP and Tunnel Junctions Toward p-GaN MOSCAP</Title> <PublishedIn> <Publication> </Publication> </PublishedIn> <PublicationDate>2024-08</PublicationDate> <DOI>https://doi.org/10.7298/r7y5-4d18</DOI> <Authors> <Author> <DisplayName>Zhang, Hanqiao</DisplayName> <Affiliation> <OrgUnit> </OrgUnit> </Affiliation> </Author> </Authors> <Editors> </Editors> <Publishers> <Publisher> <OrgUnit /> </Publisher> </Publishers> <Keyword>Gallium nitride</Keyword> <Abstract>With remarkable attributes of unique polarization characteristics, high electron mobility, and saturation velocity, gallium nitride (GaN) material has emerged as a key contender in the high-performance semiconductor market, paving the way for the future optoelectronics and high-frequency electronics. The oxide/semiconductor interface quality could significantly impact device performance and reliability if not properly managed. This thesis intends to categorize different types of charge trapping effects at the oxide/semiconductor interface and highlight their influence on the device performance. The approach to identify and separate the influence of different oxide traps is suggested based on electrical characterization methods. The quality of the oxide/GaN interface is discussed in the context of experimentally fabricated MOS capacitors on n-type GaN (000), utilizing dielectric materials grown by plasma-enhanced atomic layer deposition. Additionally, this thesis presents findings from the 1st and 2nd generation GaN homojunction tunnel diodes, contributing to the fabrication of MOS capacitors on p-type GaN (0001) substrate for interface quality studies. Lastly, recommendations for optimized device design are provided based on literature survey.</Abstract> <Access xmlns="http://purl.org/coar/access_right" > </Access> </Publication>