POLARIZATION ENGINEERED VERTICAL TUNNELING DEVICES IN GAN
No Access Until
Permanent Link(s)
Collections
Other Titles
Author(s)
Abstract
As the world shifts towards in focus to improved power efficiency, the limits of the MOSFET have become apparent. Aggressive transistor scaling has led to increased Off state leakage currents which have raised power consumption to unacceptable levels. The source of this issue is the physically limited subthreshold slope (SS) of a MOSFET. Due to the Boltzmann tail of thermally excited electrons, the SS cannot go lower than 60 mV/dec at room temperature. A promising candidate to replace the MOSFET is the tunnel field effect transistor (TFET). By relying on interband tunneling rather than thermal conduction, a TFET has the potential to realize a sub 60 mV/dec SS. This is possible because of the offset between the source valence band and channel conduction band which filter out the high energy electrons. Great work has been shown in semiconductors such as Si and III-V’s, where subthreshold slopes as low as 35 mV/dec have been reliably demonstrated. This work focuses on the growth and fabrication of GaN vertical nanowire TFETs, using a gate all around (GAA) architecture. By leveraging the polarization fields inherent in III-N semiconductors to realize large internal fields, a GaN/InGaN heterojunction is used create a wide bandgap TFET capable of suppressing the ambipolar leakage the plagues narrow bandgap based TFETs. A comparison of two forms of nanowire formation is done to show the advantage of using a top-down approach to fabricating nanowire devices. By using a highly anisotropic KOH based wet etch, GaN nanowires with 50 nm diameters are reliably generated. Using an InGaN tunnel junction consisting of 27%In, the first demonstration of a GaN TFET is shown. Though careful processing, a TFET with a SS of 109 mV/dec and On current densities as high as 70 uA/um is demonstrated. Temperature dependent measurements show that this SS is limited by trap assisted tunneling. A third generation of TFET shows signs of negative differential resistance (NDR) for negative drain biases, a strong sign of interband tunneling. While further investigation is still needed, these results show the potential for a new era of low power wide bandgap transistors.
Journal / Series
Volume & Issue
Description
Sponsorship
Date Issued
Publisher
Keywords
Location
Effective Date
Expiration Date
Sector
Employer
Union
Union Local
NAICS
Number of Workers
Committee Chair
Committee Co-Chair
Committee Member
Xing, Huili