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Solid-State Terahertz And Millimeter-Wave Electronics: Reaching The Fundamental Limits

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There is a growing interest in terahertz and mm-wave systems for compact, low cost and energy efficient imaging and spectroscopy. Detection of concealed weapons, cancer diagnosis, food quality control, and breath analyses for disease diagnosis are among many examples that will rapidly flourish if compact and on-chip terahertz systems are realized. There are few implementations of terahertz building blocks using compound semiconductors at lower terahertz range. Unfortunately, these processes have low yield, are cost inefficient, and are not suitable for integration of digital blocks on the same chip. On the other hand, while CMOS can overcome these challenges, the best reported fmax of CMOS transistors fall well below terahertz frequencies. To overcome these drawbacks, we have introduced systematic methodologies for designing circuits and components operating close to and beyond the conventional limits of the devices. These circuit blocks can effectively generate, combine, and process signals from multiple devices to achieve performances orders of magnitude better than the state of the art. The proposed techniques are general and can be used in any technology, including CMOS and other processes. As an example, in Chapter 1 we show a traveling-wave frequency multiplier for high power and wide-band terahertz and mm-wave signal generation. It takes advantage of standing-wave formation and loss cancelation in a distributed structure to generate high amplitude signals resulting in high harmonic power. Wide bandwidth operation and odd harmonic cancelation around the center frequency are the inherent properties of this frequency multiplier. Using this methodology, we implemented a frequency doubler that operates from 220 GHz to 275 GHz in a standard 65 nm CMOS process. Output power of -6.6 dBm (0.22 mW) and conversion loss of 11.4 dB are measured at 244 GHz. This signal source has twice the operating frequency and tuning range of the best reported CMOS multiplier and 10 times higher output power than the best reported CMOS realization. In Chapter 2 a systematic approach to designing high frequency and high power oscillators using activity condition is introduced. This method finds the best topology to achieve frequencies close to the fmax of the transistors. It also determines the maximum frequency of oscillation for a fixed circuit topology, considering the quality factor of the passive components. Using this technique, in a 0.13 [MICRO SIGN]m CMOS process, we design and implement 121 GHz and 104 GHz fundamental oscillators with the output power of -3.5 dBm and -2.7 dBm, respectively. Next, we introduce a novel triple-push structure to realize 256 GHz and 482 GHz oscillators. The 256 GHz oscillator was implemented in a 0.13 [MICRO SIGN]m CMOS process and the output power of -17 dBm was measured. The 482 GHz oscillator generates -7.9 dBm (160 [MICRO SIGN]W) in a 65 nm CMOS process which is 8,000 times more than any other CMOS sources at this frequency range. A systematic method to design high gain amplifiers at frequencies close to the fmax of the transistors is introduced in Chapter 3. This approach finds the optimum termination conditions to reach the maximum achievable gain of the device. Using this technique in a standard 130 nm CMOS process, we design and implement a 107 GHz amplifier with a gain of 12.5 dB, PAE of 4.4%, and saturated output power of >2.3 dBm, consuming 31 mW from a 0.95 V supply. The center frequency of this amplifier is higher than any other reported amplifier in 130 nm and 90 nm CMOS process. Other specifications such as gain and PAE is comparable to amplifiers in 65 nm CMOS process while consuming 1/3 of the DC power. Moreover, to go beyond the conventional limitations of passive circuits, we develop a method to perform signal processing using 2-D electrical lattices in Chapter 4. The rich 2-D propagation properties of the medium are used to introduce a novel, high quality factor filter called an electrical prism which is compatible with today's conventional integrated circuit processes. The proposed filter shows a quality factor much larger than the quality factor of the individual components at high mm-wave and terahertz frequencies. This structure also provides a negative effective index in a low pass LC lattice. Based on this idea, we show filters with quality factors of 130 at 230GHz and 420 at 460GHz consisting of elements with the quality factor of 10 and 20 respectively. The negative effective index and the filter behavior of the lattice is verified by measuring a prototype on a CMOS process at 32GHz-40GHz.

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2011-08-31

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Afshari, Ehsan

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Gaeta, Alexander L.
Apsel, Alyssa B.
Pollock, Clifford Raymond

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Electrical Engineering

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Ph. D., Electrical Engineering

Degree Level

Doctor of Philosophy

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dissertation or thesis

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