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dc.contributor.authorBrent, Richard P.en_US
dc.contributor.authorLuk, Franklin T.en_US
dc.date.accessioned2007-04-23T16:45:59Z
dc.date.available2007-04-23T16:45:59Z
dc.date.issued1982-11en_US
dc.identifier.citationhttp://techreports.library.cornell.edu:8081/Dienst/UI/1.0/Display/cul.cs/TR82-526en_US
dc.identifier.urihttps://hdl.handle.net/1813/6365
dc.description.abstractThe solution of an (n+1)x(n+1) Toeplitz system of linear equations on a one-dimensional systolic architecture is studied. Our implementation of an algorithm due to Bareiss is shown to require only $O(n)$ time and $O(n)$ storage, i.e. constant storage per systolic processor. Key words and phrases: Systolic arrays, Toeplitz matrices, linear equations, Bareiss algorithm, VLSI.en_US
dc.format.extent1350927 bytes
dc.format.extent403288 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/postscript
dc.language.isoen_USen_US
dc.publisherCornell Universityen_US
dc.subjectcomputer scienceen_US
dc.subjecttechnical reporten_US
dc.titleA Systolic Array for the Linear-Time Solution of Toeplitz Systems of Equationsen_US
dc.typetechnical reporten_US


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