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dc.contributor.authorKirman, Nevinen_US
dc.date.accessioned2010-04-09T20:23:47Z
dc.date.available2015-04-09T06:27:29Z
dc.date.issued2010-04-09T20:23:47Z
dc.identifier.otherbibid: 6890951
dc.identifier.urihttps://hdl.handle.net/1813/14817
dc.description.abstractIn this dissertation, we address the on-chip cross-core and -memory interconnection problem facing future large-scale chip multiprocessors (CMPs) through the use of silicon optical technology. CMOS-compatible silicon photonics is a disruptive technology that can potentially enable high-bandwidth, low-latency, and low-power interconnect solutions for both off- and on-chip data communication. Although the technology is still in its formative stages, and the more near-term application is chip-to-chip communication, rapid advances have been made in the development of on-chip optical interconnects and devices. We first investigate the potential of optical technology to construct a lowlatency, high-bandwidth shared bus supporting snoopy cache coherence in future CMPs. While not exhaustive, our initial investigation yields a hierarchical opto-electrical system that exploits the advantages of optical technology while abiding by projected limitations. Our evaluation shows that, compared to an aggressive all-electrical bus of similar power and area, significant performance improvements can be achieved using an opto-electrical bus. This performance improvement is largely dependent on the number of implemented wavelengths per waveguide. We further improve on the data network. We present an all-optical approach to constructing data networks on chip that combines the following key features: (1) Wavelength-based routing, where the route followed by a packet depends solely on the wavelength of its carrier signal, and not on information either con- tained in the packet or traveling along with it. (2) Oblivious routing, by which the wavelength (and thus the route) employed to connect a source-destination pair is invariant for that pair, and does not depend on ongoing transmissions by other nodes, thereby simplifying design and operation. And (3) passive optical wavelength routers, whose routing pattern is set at design time, which allows for area and power optimizations not generally available to solutions that use dynamic routing. We construct such an all-optical network and propose a connection-based operation. Our evaluation shows that our approach is competitive with prior proposals from the performance standpoint, yet it yields significantly more power-efficient designs.en_US
dc.language.isoen_USen_US
dc.titleOn-Chip Optical Interconnects For Chip Multiprocessorsen_US
dc.typedissertation or thesisen_US


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