Now showing items 1-2 of 2

    • Fast Compiled Logic Simulation Using Linear BDDs 

      Gupta, Sudeep; Pingali, Keshav (Cornell University, 1995-06)
      This paper presents a new technique for compiled zero delay logic simulation, and includes extensive experiments that demonstrate its performance on standard benchmarks. Our compiler partitions the circuit into fanout-freeregions ...
    • Fast Compiled Logic Simulation Using Linear BDDs 

      Gupta, Sudeep; Pingali, Keshav (Cornell University, 1995-06)
      This paper presents a new technique for compiled zero delay logic simulation, and includes extensive experiments that demonstrate its performance on standard benchmarks. Our compiler partitions the circuit into fanout-free ...